Analyzing quot Writing Assignment Help

My code is currently not working out like I want it to , it is supposed to split up the three components of a floating point number into the sign, exponent and fraciton part of a 32 bit int. Here is the code:

#include <stdio.h>

#include <stdint.h>

#include <stdlib.h>

#include <assert.h>

#include “floats.h”

uint32_t u;

uint32_t sign;

uint32_t exponent;

uint32_t fraction;

// separate out the 3 components of a float

float_components_t float_bits(uint32_t f) {

sign = ((f>> 31) & 0x1);

exponent = ((f >> 30) & 0x7F);

fraction = ((f >> 23) & 0xFFFFFF);

}

Floats.h

#include <stdio.h>

#include <stdint.h>

#include <stdlib.h>

#include <assert.h>

/// We use `union overlay’ to obtain the raw bits of a `float’-type

/// value, by storing the `float’ in the `f’ field and then using the

/// `u’ field to obtain the bits.

union overlay {

float f;

uint32_t u;

};

/// A struct suitable for storing the three components of a `float’.

typedef struct float_components {

uint32_t sign;

uint32_t exponent;

uint32_t fraction;

} float_components_t;

/// For the `float_bits’ exercise:

float_components_t float_bits(uint32_t bits);

int is_nan(float_components_t f);

int is_positive_infinity(float_components_t f);

int is_negative_infinity(float_components_t f);

int is_zero(float_components_t f);

/// For the `float_2048′ exercise:

uint32_t float_2048(uint32_t f);

/// For the `float_less’ exercise:

uint32_t float_less(uint32_t bits1, uint32_t bits2);

/// For the `float_print’ exercise:

void float_print(uint32_t f);

Test Float_bits

#include <stdio.h>

#include <stdint.h>

#include <stdlib.h>

#include <assert.h>

#include “floats.h”

int main(int argc, char *argv[]) {

for (int arg = 1; arg < argc; arg++) {

union overlay input;

input.f = atof(argv[arg]);

float_components_t c = float_bits(input.u);

printf(“float_bits(%.9g) returnedn”, input.f);

printf(“sign=0x%xn”, c.sign);

printf(“exponent=0xxn”, c.exponent);

printf(“fraction=0xxn”, c.fraction);

printf(“is_nan returned %dn”, is_nan(c));

printf(“is_positive_infinity returned %dn”, is_positive_infinity(c));

printf(“is_negative_infinity returned %dn”, is_negative_infinity(c));

printf(“is_zero returned %dn”, is_zero(c));

}

return 0;

}

I am really stuck and not sure what to do please any help would be much appreciated

Global Supply Chain Management

OPER 8340

Assignment #2

Using the information provided in your text for GoGreen biofuels (pages 15-16, and at the end of each chapter), address the following:

• Describe the actions that GoGreen should take to evaluate its suppliers. Be specific and provide examples.(10 marks)
• As an importer of bioethanol, what are some of the major risks that GoGreen faces with the supply chain? Be specific and provide examples. (10 marks)
• Evaluate the impact of each risk (use tables 12.2, 12.3 and 12.4) that you have identified.Explain your rationale.Be specific. (15 marks)
• Describe strategies that GoGreen can take to mitigate security risks associated with its supply chain.Be specific and provide examples.(10 marks)

You have become a reflective practitioner and have learned, applied, and evaluated teaching theories as well as analyzed and evaluated different models of learning styles. For this assignment, you will watch segments from the videos: The school that turned Chinese: Episode 1, Episode 2, and Episode 3. The videos are about a British school that experimented with two different teaching styles: the method they had been using, a more student-centered approach; and the Chinese method, a more teacher-centered approach. The school brought in five teachers from China to complete the experiment. The videos document this experiment with assessment and analysis of each approach.

Watch the following segments:

Episode 1: Segments 5, 6, 12, & 15

Episode 2: Segments 6 & 10

Episode 3: Segments 5, 6, 11, 14, & 17

As you watch each segment, answer the following questions:

1. Was the method teacher-centered or student-centered?
2. How did the students respond to the method?
3. Were the students’ responses academic or behavior related? How can you tell?
4. Based on question 1: When another approach was utilized by the teacher (or another teacher), did it change the response of students?
5. If you answered yes to #4, explain why you think a change occurred. If you answered no, why did no change occur?
6. Was there a match between teaching style and learning style demonstrated in any segments? Explain.

Using your notes from the segments you viewed of The School that Turned Chinese, it is now your turn to present an argument using evidence from your notes for or against learning styles. You must support your conclusion with at least five scholarly resources from peer-reviewed journals. Please also provide examples from the video that support or contest these learning styles. Make a clear a compelling argument for your point of view.

Length: 5-7 pages.

Your paper should demonstrate thoughtful consideration of the ideas and concepts presented in the course by providing new thoughts and insights relating directly to this topic. Your response should reflect scholarly writing and current APA standards where appropriate. Be sure to adhere to Northcentral University’s Academic Integrity Policy.

1) Begin by creating a netlist for SR-Latch. Latch should have two inputs (S and R) and two outputs (Q and QN). Be sure to also include ground and VDD. Make each transistor of your latch minimum-sized (use the minimum width and length for each transistor).

2) Simulate SR-latch to ensure that it works properly (use a transient analysis)–test setting Q to 1, holding this output value, resetting Q to 0, holding this output value, asserting set and reset at the same time, and holding this output value. I suggest that you create a subcircuit (in Spice, this is .SUBCKT) of your latch.

3) Then we need to modify the code to create a fanout-of-4 (FO4) at each output of SR-latch–this is one common way to add load to a circuit in order to more accurately measure its performance. To create a FO4 configuration, use two additional, identical copies of your latch as loads. Connect your Q output to both the S and R inputs of one of your load latches and connect your QN output to both the S and R inputs of your other load latch. Then we must measure the performance of your first latch and just use the other two copies as loads. You must also use a separate DC source for the VDD of each latch (this will ensure that you only measure the current of the first latch when calculating power and energy performance).

Note:

i) Measure and record the rise-time of output Q (from 10% to 90% of VDD) and propagation delay (from S to Q) for the set operation. Also measure and record the fall-time of output Q (from 90% to 10% of VDD) and propagation delay (from R to Q) for the reset operation. I recommend using CosmosScope to make these measurements.

ii) Measure and record the average current required (the current from the supply voltage, VDD) during your SR-Latch’s (1) hold operation, (2) set operation, and (3) reset operation (again, I recommend using CosmosScope to make these measurements). Calculate the average power dissipated during your SR-Latch’s (1) hold operation, (2) set operation, and (3) reset operation. Also calculate the average energy dissipated during your SR-Latch’s (2) set operation and (3) reset operation.

iii) Obtain waveform of your inputs (S and R) and outputs (Q and QN) showing you first asserting set and reset at the same time, and afterwards, immediately performing the hold operation. Describe what behavior you are observing and why this is occurring.

Note: >Now resize your transistors (change the NMOS and/or PMOS widths) to obtain equal rise- and fall-times. Do this in your Spice subcircuit (to ensure that all of your latches (the SR-Latch being measured and the two load latches) are still identical). Now obtain the following information from the FO4 simulation of your resized SR-Latch.

iv) List and explain the widths you chose for each of your transistors

• For example: what calculations did you perform, what was the sequence of changes/simulations you performed which led you to your final transistor values, etc.
• v) Compare and explain these results with your initial, minimum-sized SR-Latch
  • For example: how did the delays change (what percent increases/decreases and why?), how did the powers change (what percent increases/decreases and why?), etc.